Semiconductor dice containing integrated circuits can be interconnected (e.g., attached, bonded, joined, coupled) with other semiconductor dice (in singulated form as well as in wafer or partial wafer form), interposers, circuit boards, and other higher-level packaging, to electrically and physically connect the integrated circuits thereof. For example, a semiconductor die including conductive structures (e.g., studs, columns, pillars) protruding from at least one surface thereof (e.g., a front side surface) may be inverted (e.g., flipped upside down), the conductive structures may be aligned with other conductive structures (e.g., pads, bumps) protruding from at least one surface (e.g., a back side surface) of another semiconductor die, and the conductive structures and other conductive structures may be attached to one another. Multiple semiconductor dice may be stacked upon one another in this manner to form a stacked semiconductor device assembly.
Conventionally, a solder material may be utilized to accomplish the electrical interconnection of semiconductor dice, while also providing a physical interconnection. The solder material may, for example, be in the form of a solder mass (e.g., ball, bump, layer) supported by a portion of at least one conductive structure of a semiconductor die and/or by a portion of at least one conductive structure of another semiconductor die positioned for attachment to the semiconductor die. The solder material may be reflowed to form at least one interconnect structure between the semiconductor die and the other semiconductor die that attaches the semiconductor die and the another semiconductor die to one another. The interconnect structure may comprise a bulk solder interconnect (BSI) structure or intermetallic compound (IMC) interconnect structure.
BSI structures include structures wherein a solder material has not been substantially converted into an IMC. For example, a BSI structure may comprise a structure substantially formed of and including unconverted solder material, or may comprise a structure formed of and including unconverted solder material and at least one IMC (e.g., unconverted solder material disposed between opposing regions of an IMC). Unfortunately, BSI structures can exhibit problems that may inhibit the reliability, performance, and durability of semiconductor device structures including the BSI structures. For example, during and/or after the formation of a BSI structure, the solder material may slump or even wick beyond peripheral boundaries of at least one conductive structure (e.g., pillar, bond pad) associated therewith, weakening the strength of the attachment between the interconnected semiconductor dice. In addition, the solder material of the BSI structure may undesirably facilitate the formation of voids (e.g., Kirkendall voids at an interface of the solder material and another material) after the formation of the BSI structure due to atomic migration and electron sweep.
IMC interconnect structures include structures wherein a solder material has been substantially (e.g., completely) converted into an IMC. IMC interconnect structures alleviate many of the problems associated with BSI structures (e.g., solder slumping, some post-formation interfacial void generation). Unfortunately, however, conventional methods of forming IMC interconnect structures can be impractical and/or may result in other defects that inhibit the reliability, performance, and durability of semiconductor device structures including the IMC interconnect structures. For example, conventional formation methods utilizing nickel diffusion into a tin-based solder material (e.g., to form a nickel-tin IMC interconnect structure) can be prohibitively time-consuming due to the very slow diffusion rate of nickel. As another example, conventional formation methods utilizing copper diffusion into a tin-based solder material (e.g., to form a copper-tin IMC interconnect structure), while significantly faster than formation methods utilizing nickel diffusion into a tin-based solder material due to the relatively rapid diffusion rate of copper, can result in the formation voids (e.g., Kirkendall voids at an interface of the IMC interconnect structure and remaining copper material). Such voids are due at least to the conversion of Cu6Sn5 intermetallic into Cu3Sn intermetallic and extra tin atoms and the availability of additional copper (e.g., from the remaining copper material) for rapid diffusion into the IMC interconnect structure and to react with the extra tin atoms.
It would, therefore, be desirable to have improved methods and structures that facilitate the interconnection of semiconductor dice while mitigating one or more of the problems conventionally associated with such interconnection.